1. Field of the Invention
The invention relates to a data processing system for processing parallel first and second sequences of successive first and successive second data, respectively. The system comprises a memory means, having a memory input to receive the first and second data for storage; and an operating means coupled to a memory output of the memory means to receive a predetermined number of selected ones of the stored first data or the predetermined number of selected ones of the stored second data supplied by the memory means, and for operating thereon.
2. Background Art
Such a system is known from Philips' IC TDA 1307, for use in a stereo audio processing circuit. The operating means of the known IC includes a transversal filtering means to filter audio samples from both a right hand side channel and a left hand side channel. Filtering is performed by way of a transversal filter. That is, respective successive samples are multiplied by respective coefficients and thereupon summed to implement a convolution. The filter function typically is a symmetric function, e.g., sync(y)=sin(y)/y.
Since the used filter function is evenly symmetrical, samples to be filtered preferably are functionally grouped into pairs, each respective pair being associated with a respective single one of the filter coefficients. Accordingly, by first forming the sum for each such pair and thereupon multiplying the sum by the associated coefficient, a multiplication is saved for each such pair. Note that the same approach holds true for an odd filter function.
In order to perform the summing operation, it is required that in each cycle the two samples constituting such a pair, either originating from the left hand side channel or from the right hand side channel, are made available simultaneously. This could be achieved by using a single multiport-RAM in order to store the samples and to thereupon provide the required samples in parallel. This architecture, however, would represent a relatively expensive solution. As an economic alternative, the prior art employs two physically separated RAMs, one for storing the most recent half of the successive samples, both right hand side and left hand side, to be multiplied by the associated filter coefficients and another one for storing the earlier half of the successive samples to be multiplied by the same coefficients.
Although the known architecture functions perfectly well, it entails some less advantageous features. First, the use of two separate RAMs requires a relatively larger substrate area than the use of a single RAM, owing to, among other things, the duplication of memory control circuitry, and of signal and power supply leads. Second, additional circuitry is needed to repetitively transfer the recent samples, stored in the recent-sample-RAM, to the earlier-sample-RAM when they have attained the status of "earlier samples". This not only gives rise to additional substrate area and additional power consumption, but also needs extra cycles during which the filtering operation itself is to be put on hold or idles. Third, the processing of samples is performed in repetitive cycles, the order of handling right hand side samples and left hand side samples being distributed non-uniformly during each cycle. As a result, retrieval control is somewhat complicated.